1. Field of the Invention
The present invention relates to a liquid crystal display panel, and more particularly to a liquid crystal display panel with reduced pixel defects.
2. Description of the Related Art
In recent years, research and development has been pursued actively on liquid crystal displays which make it possible to reduce the thickness of the display panel. In particular, the active matrix addressing method using thin film transistors has been the object of research in view of its potential as a method which is capable of preventing the occurrence of the contrast deterioration problem in liquid crystal displays and enables the creation of a display with a large number of scanning lines (namely, a large capacity).
In applying thin film transistors to a liquid crystal display, it becomes necessary to form a thin film transistor array with satisfactory yield at low cost. In so doing, it is desirable to give the simplest possible structure to the thin film transistor.
As the thin film semiconductor material for the thin film transistor, use is usually made of amorphous silicon, polycrystalline silicon, cadmium sulfide or the like. In FIG. 1 is shown a sectional view of a thin film display as disclosed in Applied Physics, Vol. 24, pp. 357-362, 1981 for the case of using amorphous silicon as the thin film semiconductor material. In this structure, both a gate electrode 21 and a pixel electrode 23 are formed into an island pattern on the same glass substrate 20. This thin film transistor (TFT) element has a gate insulating film 30 formed so as to cover both the gate electrode 21 and the pixel electrode 23, an islandlike semiconductor film 25, a source electrode 29 electrically connected to the pixel electrode 23, and a drain electrode 28 which serves as a signal line.
Further, another structure used for the liquid crystal display which is disclosed in Society of Information Display (SID), p. 310, 1988 is shown in FIG. 2. This transistor includes first and second insulating films 22 and 24 formed so as to cover a gate electrode 21 provided on a glass substrate 20, a semiconductor film 25 formed into an island pattern on the second insulating film 24, and source and drain electrodes 29 and 28 that are electrically connected respectively to source and drain regions 27 formed on the semiconductor film 25. A pixel electrode 23 is formed on the second insulating film 24 to be connected with the source electrode 29. Reference numeral 26 is a protective film.
In the transistor structures shown above, the structure shown in FIG. 1, for example, is designed so as to avoid bringing the gate electrode 21 and the pixel electrode 23 into electrical contact on the glass substrate 20. Further, the structure shown in FIG. 2 is designed so as to avoid the electrical contact between the drain electrode 28 and the pixel electrode 23 in the same plane, as is indicated in the explanatory diagram shown in FIG. 3. However, in the manufacturing process of the transistor array, electrical contact tends to be formed between the gate electrode 21 and the pixel electrode 23 or between the drain electrode 28 and the pixel electrode 23, because of dust that strays into the device during the photoresist process or the like. When such a contact takes place, it is represented as a point defect in the picture display, which becomes a cause for the deterioration in the yield.